Every tone (sub-carrier) can be loaded with up to a maximum of 15 bits. Due to prevailing, ambient, conditions along with power spectral density (PSD) (and other) masks, certain sub-carriers will have less than that full loading.
Hence the performance of the circuit is directly proportional to the number of sub-carriers that carry anything from 1 to 15 bits.
As examples, I attach the bit loading v sub-carrier index plot created for my own VDSL2 circuit (dated Jan 1st, 2022) and the equivalent plot created for a short length, test, VDSL2 circuit that I set up in "The Cattery" (dated Apr 24th, 2021).
The real circuit (Jan 1st, 2022) showed --
> xdslctl info --state
xdslctl: ADSL driver and PHY status
Status: Showtime
Last Retrain Reason: 0
Last initialization procedure status: 0
Max: Upstream rate = 18373 Kbps, Downstream rate = 44123 Kbps
Bearer: 0, Upstream rate = 10000 Kbps, Downstream rate = 40000 Kbps
Bearer: 1, Upstream rate = 0 Kbps, Downstream rate = 0 Kbps
Whilst the test circuit (Apr 24th, 2021) showed --
> xdslctl info --state
xdslctl: ADSL driver and PHY status
Status: Showtime
Last Retrain Reason: 0
Last initialization procedure status: 0
Max: Upstream rate = 48545 Kbps, Downstream rate = 139380 Kbps
Bearer: 0, Upstream rate = 48545 Kbps, Downstream rate = 97762 Kbps
Bearer: 1, Upstream rate = 0 Kbps, Downstream rate = 0 Kbps