The interleaving depth will be increased if he upgrades and I think he wont get anywhere close to 80mbit sync speed.
Nor, as I have already said
several times, do I think he will achieve the full 80/20. But I can't predict exactly what he
will get, any more than you have with the 'precise' estimate you have made
... not anywhere close
So, you imagine what, 41/2.1? No competent engineer, seeing that kind of performance on an 80/20 product, would let it go uninvestigated.
Something is causing these recovered errors. But, frankly I think no one would investigate it while his line's
capability so far exceeds it's current product banding, that he is
achieving 100% of everything he's currently paying for.
[Edit] PS: I guess you would say I was just
lucky then to survive bursts of 3.5Million bit errors/min over a 2-3 minute period on ~half his current interleaving depth?